In a system comprising a plurality of memory masters which share one memory, a memory arbitration circuit assigns memory use rights to the respective memory masters, and therefore determines the priority order of the memory masters. There are known three conventional methods for determining the priority order as follows:
1. a method of fixedly presetting the priority order; 2. a method of varying the settings of the priority order beforehand in order to, for example, deal with various applications; 3. a method of varying the priority order by round robin scheduling.
A DRAM (dynamic random access memory) such as SDRAM, DDR SDRAM, Direct Rambus is comprised of a plurality of banks. Addresses assigned to the DRAM include bank address for indicating the location of each bank, row address for indicating the location of a page in each bank, and column address for indicating a location in each page.